By Elie Maricau
This e-book specializes in modeling, simulation and research of analog circuit getting older. First, all vital nanometer CMOS actual results leading to circuit unreliability are reviewed. Then, transistor getting older compact versions for circuit simulation are mentioned and a number of other tools for effective circuit reliability simulation are defined and in comparison. finally, the influence of transistor getting older on analog circuits is studied. Aging-resilient and aging-immune circuits are pointed out and the effect of expertise scaling is mentioned.
The types and simulation innovations defined within the e-book are meant as an relief for machine engineers, circuit designers and the EDA neighborhood to appreciate and to mitigate the impression of getting older results on nanometer CMOS ICs.
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Extra resources for Analog IC Reliability in Nanometer CMOS
2008) proposed an improved model that includes the three most important sources of hot carriers: channel hot electrons, substrate hot electrons and drain avalanche hot carriers, depending on the drain current, the substrate current and the drain voltage respectively. Tudor et al. (2011) further improved on Li’s model by combining the separate effects into one model that is equally accurate but easier to calibrate. Further, when scaling to deep-submicron technologies and working at lower voltages, different and more accurate explanations for the HCI effect have been proposed.
That model was further refined in (Rauch and La Rosa 2005). Guerin et al. (2007) confirmed this energy-driven approach and they showed how, in the high-energy long-channel case, this approach allows to retrieve LEM-like equations. Further, when the energy is lowered, highenergy electrons are mostly generated by electron–electron scattering. Finally, for even lower energies, the multiple vibration excitation mechanism dominates the hot carrier degradation rate. This understanding led to the development of new and more complete models to estimate HCI in advanced CMOS processes (Bravaix et al.
E. >90 nm) (Moens et al. 2010). g. inductor-based oscillators or power amplifiers) (Chouard et al. 2010; Sagong et al. 2011). Therefore, it is still important to correctly estimate the impact of HCI on the behavior of a circuit. This requires an accurate HCI compact model. HCI mainly occurs in nMOS transistors and causes a shift of important transistor parameters such as the threshold voltage and the carrier mobility. This section first reviews the most important HCI models published in literature.
Analog IC Reliability in Nanometer CMOS by Elie Maricau